Magnetic hard disk drives (HDDs) are known as memory devices included computer systems, for example, as typical host systems. Furthermore, solid state drives (SSDs) including nonvolatile semiconductor memories such as NAND flash memories, embedded NAND flash memories, and the like are known as memory devices. SSDs and embedded NAND flash memories are classified into memory devices but can also be deemed to be memory systems that are enlarged in size.
Such a memory system includes an interface, a first memory, a second memory, and a controller, for example. The first memory stores data. The second memory is a buffer memory used in writing and reading data. The first memory is a nonvolatile memory that is larger than the second memory but has a lower access speed. The second memory is also used for compensating for the difference between the transmission rate of the interface and the writing speed or reading speed of the first memory.
The first memory is a nonvolatile flash memory, for example. The second memory is a volatile DRAM or SRAM, for example. DRAM stands for a “dynamic random access memory.” SRAM stands for a “static random access memory.” In such a memory system, write data transmitted from a host system are coded for error correction (ECC) and then written into the first memory. Data read from the first memory are subjected to an error correction process and a decoding process, and then transmitted to the host system.
The error rate is higher as the first memory is larger. The error rate is also higher as the number of times of writing and erasing of the first memory increases. To compensate for this, a functional block for performing error correction according to the error occurrence tendency of the first memory is provided in the periphery of the controller and the memory. The lifetime of the first memory can be effectively extended by obtaining the error occurrence tendency and performing optimum “reading,” “writing” and “erasing” operations.
However, in order to analyze optimum “reading,” “writing” and “erasing” operations and implement algorithms or parameters in the controller for each of generations and each of characteristics of design and miniaturization of the first memory, the overall operation of the first memory needs to be tested in an exhaustive manner. There has thus been a problem in which it requires a long time for analysis of the operations even with a specialized analysis program.
Algorithms or parameters for an average operation tendency of first memories produced in large quantities can be implemented in controllers. It is, however, difficult to implement algorithms or parameters based on the characteristics of each first memory (=individual characteristics of each LSI chip) in a controller. LSI stands for “large scale integration.” in the memory systems of related art, for the reasons described above, it is difficult to optimize operation for each first memory and it is difficult to effectively extend the life time of first memories. The memory systems of the related art are therefore systems with low reliability.